Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and device parameter variations. This book systematically describes these yield and reliability issues in terms of mathematics and engineering, as well as an array of repair techniques, based on the authorsa long careers in developing memories and low-voltage CMOS circuits. Nanoscale Memory Repair gives a detailed explanation of the various yield models and calculations, as well as various, practical logic and circuits that are critical for higher yield and reliability.S. Shukuri, K. Yanagisawa and K. Ishibashi, aCMOS process compatible ie-flash ( inverse gate electrode flash) ... M. Tarr, D. Boudreau and R. Murphy, aDefect analysis system speeds test and repair of redundant memories, a Electronics, vol.
Title | : | Nanoscale Memory Repair |
Author | : | Masashi Horiguchi, Kiyoo Itoh |
Publisher | : | Springer Science & Business Media - 2011-01-11 |
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